AMS Circuit Design Optimization Technique Based on ANN Regression Model With VAE Structure

The advanced design of an analog mixed-signal circuit is not simple enough to meet the requirements of the performance matrix as well as robust operations under process-voltage-temperature (PVT) changes. Even commercial products demand stringent specifications while maintaining the system’s performance. The main objectives of this study are to increase the efficiency of the design optimization process by configuring the design process in multiple regression modeling stages, to characterize our target circuit into a regression model including PVT variations, and to enable a search for co- optimum design points while simultaneously checking performance sensitivity. We used an artificial neural network (ANN) to develop a regression model and divided the ANN modeling process into coarse and fine simulation steps. In addition, we applied a variational autoencoder (VAE) structure to the ANN model to reduce the training error due to an insufficient input sample. According to the proposed algorithm, the AMS circuit designer can quickly search for the co- optimum point, which results in the best performance, while the least sensitive operation as the design process uses a regression model instead of launching heavy SPICE simulations. In this study, a voltage-controlled oscillator (VCO) is selected to prove the proposed algorithm. Under various design conditions (CMOS 180 nm, 65 nm, and 45 nm processes), we proceed with the proposed design flow to obtain the best performance score that can be evaluated by a figure-of-merit (FoM). As a result, the proposed regression model-based design flow achieves twice accurate results in comparison to that of the conventional single-step design flow.

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Novel Approach to FDSOI Threshold Voltage Model Validated at Cryogenic Temperatures

The paper presents a novel approach to the modeling of the back-gate dependence of the threshold voltage of Fully Depleted Silicon-On-Insulator (FDSOI) MOSFETs down to cryogenic temperatures by using slope factors with a gate coupling effect. The FDSOI technology is well-known for its capability to modulate the threshold voltage efficiently by the back-gate voltage. The proposed model analytically demonstrates the threshold voltage as a function of the back-gate voltage without the pre-defined threshold condition, and it requires only a calibration point, i.e., a threshold voltage with the corresponding back-gate voltage, front- and back-gate slope factors, and work functions of front and back gates. The model has been validated over a wide range of the back-gate voltages at room temperature and down to 3 K. It is suitable for optimizing low-power circuits at cryogenic temperatures for quantum computing applications.

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